DocumentCode
3090340
Title
Improving Diagnosis Resolution without Physical Information
Author
Rousset, A. ; Bosio, A. ; Girard, P. ; Landrault, C. ; Pravossoudovitch, S. ; Virazel, A.
Author_Institution
Univ. de Montpellier, Montpellier
fYear
2008
fDate
23-25 Jan. 2008
Firstpage
210
Lastpage
215
Abstract
This paper presents an extended version of a diagnosis method proposed so far, that considers only the logic information provided by the tester to achieve diagnosis results. The main advantage of the proposed method is its capability to handle several fault models at the same time, e.g., static, dynamic, at transistor level, thus setting up a unified framework for logic diagnosis. Experiments on ITC´99 benchmark circuits show the efficiency of the proposed method both in terms of diagnosis resolution and required CPU time.
Keywords
fault diagnosis; logic circuits; logic testing; CPU time; benchmark circuits; fault models; logic circuit; logic diagnosis resolution; logic information; Central Processing Unit; Circuit faults; Circuit testing; Electronic equipment testing; Failure analysis; Fault diagnosis; Logic design; Logic testing; Robots; Uniform resource locators; Fault Modeling; Logic Diagnosis; Path Tracing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Design, Test and Applications, 2008. DELTA 2008. 4th IEEE International Symposium on
Conference_Location
Hong Kong
Print_ISBN
978-0-7695-3110-6
Type
conf
DOI
10.1109/DELTA.2008.37
Filename
4459542
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