A test-vector generation methodology for crosstalk noise faults

This paper presents a new methodology to generate test vectors for crosstalk noise faults in deep sub micron devices. The methodology includes transition activation on aggressor and constant assignment on victim, transition time estimation on aggressor, noise characterization on victim, and propagating the noise to the primary outputs through the best paths. New approaches for transition time estimation and noise activation are proposed based on logic cell characterization already available in design library and solving a satisfiability problem. It is shown that test generation efficiency can be increased up to 18% and test generation time is decreased up to 30%.