Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance

In this paper, a new hierarchical multi-level technique for malicious fault list generation for evaluating the fault tolerance is presented. For the description of the system three levels are exploited: behavioral, functional signal path and structural gate-network levels, whereas at each level the model of decision diagrams and uniform fault analysis procedures are used. Malicious faults are found by top-down technique, keeping the complexity of candidate fault sets at each level as low as possible.