DocumentCode
3090691
Title
Modeling and minimization of power consumption in charge pump circuits
Author
Palumbo, Gaetano ; Pappalardo, Domenico ; Gaibotti, Maurizio
Author_Institution
DEES, Catania Univ., Italy
Volume
4
fYear
2001
fDate
6-9 May 2001
Firstpage
402
Abstract
In this communication, starting from a power consumption model, an optimized strategy to design charge pumps with the minimum power consumption is presented. The approach allows one to define the number of stages that for a given input and output voltage maximizes the power efficiency. Capacitor value is then set to provide the required current capability. The approach was analytically developed and was validated through simulations on 0.35 μm EEPROM technology
Keywords
EPROM; VLSI; integrated circuit modelling; integrated memory circuits; low-power electronics; EEPROM technology; charge pump circuits; current capability; input voltage; output voltage; power consumption; power efficiency; Analytical models; Capacitors; Charge pumps; Circuits; Diodes; Energy consumption; Minimization; Parasitic capacitance; Power supplies; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.922258
Filename
922258
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