Autocircuit: a clock edge general behavioral synthesis system with a direct path to physical datapaths

Autocircuit is a next-generation synthesis tool which makes fundamental contributions in high-level design. It accepts behavioral HDL input descriptions with multiple clock edges with no restrictions on where those edges may or may not be placed in relation to HDL operations or control constructs. It achieves this generality by novel representations and algorithms; its control and data-flow representations are called “raw-states” and “use-trees”, respectively. AUTOCIRCUIT focuses on word-oriented synthesis and bypasses logic synthesis for word-oriented operators, registers, and muxes. It maps directly to physical datapath layout tools using a unique parameterized netlist representation in which net connections themselves have a parameterized size defined by an expression