DocumentCode
309224
Title
Dynamic access load balancing on the parallel secondary storage
Author
Kitamura, Takamitsu ; Oue, Yasuhiro ; Ohnishi, Iiazumasa ; Shimizu, Masahisa
Author_Institution
Massively Parallel Syst. Sanyo Lab., Tokyo, Japan
fYear
1997
fDate
17-21 Mar 1997
Firstpage
316
Lastpage
323
Abstract
A massively parallel computer handles a massive amount of data with simultaneous access requests from multiple processors, and therefore it must have a large-capacity secondary storage system of very high concurrency. Such a storage system should consist of many disks that are connected in parallel. With such large-scale parallel disk systems, access load balancing is extremely important in order to enhance the effective operation of all disks. In this paper, we propose a parallel file access method named DECODE (Dynamic Express Changing Of Data Entry) which performs dynamic load balancing over all disks according to the load status of each disk. DECODE can achieve load balancing by changing the disk used for writing data to a low-load disk. The efficiency of this method is verified by preliminary performance evaluation using software simulation under various access conditions, by changing the access pattern and the access size. The effect of some of the parameters used in the method is also evaluated
Keywords
concurrency control; magnetic disc storage; memory architecture; parallel machines; performance evaluation; resource allocation; storage management; virtual machines; DECODE; Dynamic Express Changing Of Data Entry; access conditions; access pattern; access size; concurrency; data writing; disk load status; dynamic access load balancing; efficiency; large-scale parallel disk systems; low-load disk; massively parallel computer; parallel file access method; parallel secondary storage; parameter effects; performance evaluation; simultaneous access requests; software simulation; Application software; Computer networks; Concurrent computing; Decoding; Joining processes; Laboratories; Large-scale systems; Load management; Software performance; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Algorithms/Architecture Synthesis, 1997. Proceedings., Second Aizu International Symposium
Conference_Location
Aizu-Wakamatsu
Print_ISBN
0-8186-7870-4
Type
conf
DOI
10.1109/AISPAS.1997.581684
Filename
581684
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