• DocumentCode
    3092246
  • Title

    Architectural support predicting method for CMP scheduling

  • Author

    Jia, Gangyong ; Li, Xi ; Zhou, Xuehai ; Dai, Dong

  • Author_Institution
    Dept. of Comput. Sci. & Technol., Univ. of Sci. & Technol. of China (USTC), Hefei, China
  • Volume
    4
  • fYear
    2011
  • fDate
    11-13 March 2011
  • Firstpage
    10
  • Lastpage
    14
  • Abstract
    On a CMP (Chip Multi-Processor) architecture, cache sharing impacts threads non-uniformly, where some threads may be slowed down significantly, while others are not. This may cause severe performance problems such as throughput decreasing, cache thrashing. This paper proposes an architectural support predicting method (ASPM) to predict inter-thread cache contention, and schedules threads based on the results of the predicting on the CMP architecture. The architectural support consists of novel tagging which is remembering each cache line´s interval time of reaccessing. The ASPM is very little loss of accuracy basis at low overhead (<;1%). We use this method for CMP scheduling, and find the performance is improving 9% on average.
  • Keywords
    cache storage; microprocessor chips; multiprocessing systems; processor scheduling; CMP scheduling; architectural support predicting method; cache sharing; cache thrashing; chip multiprocessor architecture; inter-thread cache contention; tagging; Accuracy; Benchmark testing; Computer architecture; Instruction sets; Scheduling algorithm; Throughput; ASPM; CMP; cache; performance; scheduling; throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Research and Development (ICCRD), 2011 3rd International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-61284-839-6
  • Type

    conf

  • DOI
    10.1109/ICCRD.2011.5763842
  • Filename
    5763842