• DocumentCode
    3092683
  • Title

    A technique for variable dependence driven loop peeling

  • Author

    Song, Litong ; Kavi, Krishna M.

  • Author_Institution
    Dept. Comput. Sci., North Texas Univ., TX, USA
  • fYear
    2002
  • fDate
    23-25 Oct. 2002
  • Firstpage
    390
  • Lastpage
    395
  • Abstract
    Loops in programs are the source of many optimizations leading to performance improvements, particularly on modern high-performance architectures as well as vector and multithreaded systems. Among the optimization techniques, loop peeling is an important technique that can be used to parallelize computations. The technique relies on moving computations in early iterations out of the loop body such that the remaining iterations can be executed in parallel. A key issue in applying loop peeling is the number of iterations that must be peeled off from the loop body. Current techniques use heuristics or ad hoc techniques to peel a fixed number of iterations or a speculated number of iterations. To our knowledge, no formal or systematic technique that can be used by compilers to determine the number of iterations that must be peeled off based on the program characteristics. In this paper we introduce one technique that uses variable dependence analysis for identifying the number of iterations to be peeled off. Our goal is to find general techniques that can accurately determine the ideal number of iterations for loop peeling, while working within the context of other loop optimizations including code motion.
  • Keywords
    parallelising compilers; program control structures; compilers; instruction-level parallelism; loop optimizations; loop peeling; multithreaded systems; thread level parallelism; variable dependence driven loop peeling; Computer aided instruction; Computer architecture; Computer science; Concurrent computing; Multiprocessing systems; Parallel processing; Program processors; VLIW; Vectors; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Algorithms and Architectures for Parallel Processing, 2002. Proceedings. Fifth International Conference on
  • Conference_Location
    Beijing, China
  • Print_ISBN
    0-7695-1512-6
  • Type

    conf

  • DOI
    10.1109/ICAPP.2002.1173607
  • Filename
    1173607