• DocumentCode
    3092989
  • Title

    Multifunction subthreshold gate used for a low power full adder

  • Author

    Aunet, Snorre ; Oelmann, Bengt ; Lande, Tor Sverre ; Berg, Yngvar

  • Author_Institution
    Department of Informatics, University of Oslo, Postbox 1080 Blindern, N-0316 Oslo, Norway
  • fYear
    2004
  • fDate
    8-9 Nov. 2004
  • Firstpage
    44
  • Lastpage
    47
  • Abstract
    This paper presents a full-adder based on realtime reconfigurable CMOS perceptron circuits operating in subthreshold. The Perceptron is based on three output wired inverters that is configured through well biasing. The full-adder is demonstrated by simulations for a 0.12 um CMOS process. Functionality is proven for 200-400 mV power supply voltages. Minimum power consumption is 7.4 nW and power-delay-product 7.8 fJ, for a Vdd of 200 mV, according to simulations.
  • Keywords
    Adders; Boolean functions; Energy consumption; Equations; Informatics; Inverters; Logic circuits; MOSFETs; Threshold voltage; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Norchip Conference, 2004. Proceedings
  • Conference_Location
    Oslo, Norway
  • Print_ISBN
    0-7803-8510-1
  • Type

    conf

  • DOI
    10.1109/NORCHP.2004.1423818
  • Filename
    1423818
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3092989