• DocumentCode
    3093184
  • Title

    Implementation experiments of analog nonvolatile memory with a standard 0.35 μ m CMOS

  • Author

    Rantala, Aarne ; Sopanen, M. ; Aberg, Markku

  • Author_Institution
    VTT Information Technology, P.O. Box 1208, FIN-02044 VTT, Finland
  • fYear
    2004
  • fDate
    8-9 Nov. 2004
  • Firstpage
    71
  • Lastpage
    74
  • Abstract
    This paper presents a study upon implementation of a nonvolatile memory with a standard CMOS process. The main emphasis is to obtain an analog, continuous value, EEPROM module. The accuracy, reliability and reproducibility performance of the different memory cells have been investigated. Different types of programming method have been tested and compared EEPROM cells have been processed with two different 0.35 μm CMOS processes and two different process runs. Measurement results show that a reliable, medium accuracy, analog EEPROM can be implemented without any process Modifications.
  • Keywords
    CMOS process; CMOS technology; Capacitance; Circuit testing; Dielectrics and electrical insulation; EPROM; Information technology; Nonvolatile memory; Random access memory; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Norchip Conference, 2004. Proceedings
  • Conference_Location
    Oslo, Norway
  • Print_ISBN
    0-7803-8510-1
  • Type

    conf

  • DOI
    10.1109/NORCHP.2004.1423825
  • Filename
    1423825