DocumentCode
309351
Title
The RISC challenge in signal processing
Author
Schlett, Manfred
Author_Institution
Hyperstone Electron., Konstanz, Germany
Volume
1
fYear
1996
fDate
13-16 Oct 1996
Firstpage
550
Abstract
Telecommunication and multimedia are the current buzzwords in the IT domain. New services and technologies are altering the way we live and work in a way not seen since the first computer revolution. New consumer products are being launched onto the market offering, for example, interactivity and added services in the telecommunication market. A new generation of microprocessors which increasingly combines the formerly separate worlds of general purpose processing and digital signal processing constitutes the main building block for these emerging products. The hyperstone E1-32 RISC/DSP processor, a key technology in the Esprit/OMI program, is one such member of this new generation. Based on a new concept this microprocessor combines the controller and DSP world in a single architecture and targets the low-cost but high-performance market
Keywords
digital signal processing chips; microprocessor chips; reduced instruction set computing; Esprit/OMI program; RISC; digital signal processing; hyperstone E1-32 RISC/DSP processor; microprocessor; Digital signal processing; Energy consumption; Microcontrollers; Microprocessors; Reduced instruction set computing; Registers; Signal design; Signal generators; Signal processing; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on
Conference_Location
Rodos
Print_ISBN
0-7803-3650-X
Type
conf
DOI
10.1109/ICECS.1996.582927
Filename
582927
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