DocumentCode :
3093669
Title :
Integrated design flows - a battered EDA slogan or true challenge for tool development and algorithmic research
Author :
Kuehlmann, A.
Author_Institution :
Cadence Labs., Berkeley, CA, USA
fYear :
2006
fDate :
3-7 Jan. 2006
Abstract :
Summary form only for tutorial. The design of complex integrated systems faces a growing number of challenges from two frontiers. First, the increasing unpredictability of the progressing semiconductor manufacturing process requires new analysis and optimization approaches that utilize comprehensive modeling of process uncertainties for driving a novel, variation-aware design optimization flow. Second, the increasing system complexity demands new specification methods at higher levels of abstraction that can support efficient architectural exploration, functional verification, and implementation flows. Both challenges require a tight integration of the overall design tool flow resulting in a departure from traditional sequencing of point-tools. In this presentation we discuss a number of these problems in detail and outline possible approaches to their solutions. We further address their impact on algorithmic design and tool integration and discuss new opportunities for academic researchers to help overcome these challenges.
Keywords :
circuit complexity; circuit optimisation; electronic design automation; formal specification; integrated circuit design; EDA tools; design optimization flow; functional verification; integrated design flow; specification methods; system complexity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
Conference_Location :
Hyderabad, India
ISSN :
1063-9667
Print_ISBN :
0-7695-2502-4
Type :
conf
DOI :
10.1109/VLSID.2006.107
Filename :
1581429
Link To Document :
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