Title :
A Built-in self-calibration scheme for pipelined ADCs
Author :
Chang, Hsiu-Ming ; Lin, Kuan-Yu ; Chen, Chin-Hsuan ; Cheng, Kwang-Ting
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA
Abstract :
There is a strong demand for both calibrating and testing the ADC performance before and after packaging for mixed-signal SoCs and SiPs. In this paper, we propose a built-in self-calibration scheme that offers digitally-controlled calibration of a pipelined ADC without using external stimulus. We further propose a self-testing strategy that uses the effective number of bits (ENOB) derived directly from the steady-state error of the self-calibration process for go/no-go testing as well as for performance binning. This testing process will not incur any additional test time beyond that required for calibration.
Keywords :
analogue-digital conversion; calibration; system-in-package; system-on-chip; testing; built-in self-calibration scheme; digitally-controlled calibration; go/no-go testing; mixed-signal SoC; packaging; pipelined ADC; self-testing strategy; steady-state error; Analog circuits; Automatic testing; Built-in self-test; Calibration; Capacitors; Circuit testing; Linearity; Operational amplifiers; Steady-state; System-on-a-chip; ENOB testing; Mixed-signal testing; built-in-self-test (BIST); digital calibration; digitally-assisted analog testing;
Conference_Titel :
Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2952-3
Electronic_ISBN :
978-1-4244-2953-0
DOI :
10.1109/ISQED.2009.4810305