Wide limited switch dynamic logic circuit implementations

Author

Sivagnaname, Jayakumaran ; Ngo, Hung C. ; Nowka, Kevin J. ; Montoye, Robert K. ; Brown, Richard B.

Author_Institution

Michigan Univ., Ann Arbor, MI, USA

fYear

2006

fDate

3-7 Jan. 2006

Abstract

Wide circuit implementation of limited switch dynamic logic (LSDL), a high performance logic circuit, with a modified pseudo-nMOS style load has been studied in this paper. A conventional two levels of 8-way mux implementation and a wide 64-way mux implementation of the 64-bit rotator circuit were used in the analysis. The resultant wide circuit implementation consumes less power, maintains robustness to noise and power rail bounce and reduces the pipeline depth to a single stage. The effect of process variation on circuit performance is evaluated. Based on the analysis, a new circuit style known as hybrid LSDL has been proposed.

Keywords

MOS logic circuits; logic circuits; multiplexing equipment; semiconductor process modelling; 64 bit; LSDL circuit; limited switch dynamic logic circuit; modified pseudo-nMOS; mux implementation; process variation effect; rotator circuit; wide circuit implementation; Circuit analysis; Circuit noise; Circuit optimization; Logic circuits; Noise reduction; Noise robustness; Pipelines; Rails; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on

ISSN

1063-9667

Print_ISBN

0-7695-2502-4

Type

conf

DOI

10.1109/VLSID.2006.171

Filename

1581438