A single chip 802.11 a/b/g WLAN transceiver

A dual-band triple mode radio compliant with the IEEE 802.11 a/b/g standard implemented in a 0.18 μm CMOS process b presented. The transceiver is compatible with a large number of basebands due to its flexible interface towards AD / DA converters and on-chip automatic calibration of-on-chip filters and oscillators. The transceiver achieves a receiver noise figure of 4.9/5.MB for the 2.4GHz/5GHz bands, respectively, and a minimum transmit error vector magnitude (EVM) of 2.5% for both bands. A quadrature accuracy of 0.3° in phase and 0.05dB in amplitude is achieved through careful analysis and design of the I/Q generation parts of the local oscillator. The local oscillators achieve a better than -34dBc total integrated phase noise. The chip passes ± human body model ESD testing on all pins, including the RF pins. The total die area is 12mm². The power consumption is 207mW in the receive mode and 247mW in the transmit made using a 1.8Vsupply.