DocumentCode
3094726
Title
New procedures to identify redundant stuck-at faults and removal of redundant logic
Author
Chen, Gang ; Reddy, Sudhakar ; Pomeranz, Irith ; Rajski, Janusz
Author_Institution
Dept. of ECE, Iowa Univ., IA, USA
fYear
2006
fDate
3-7 Jan. 2006
Abstract
We present new procedures for identifying redundant stuck-at faults including multiple line stuck-at faults on the branches of fan-out stems. The methods proposed include new procedures to identify stuck-at faults that are simultaneously redundant thus allowing simultaneous removal of logic associated with several redundant faults. Experimental results on benchmark as well as industrial circuits are also presented to demonstrate the effectiveness of the proposed methods.
Keywords
fault diagnosis; logic design; logic testing; fan-out stems branches; industrial circuits; multiple line stuck-at faults; redundant logic removal; redundant stuck-at fault identification; Benchmark testing; Bridge circuits; Circuit faults; Circuit testing; Fault diagnosis; Integrated circuit interconnections; Logic circuits; Logic testing; Redundancy; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2502-4
Type
conf
DOI
10.1109/VLSID.2006.120
Filename
1581487
Link To Document