Temperature effects on energy optimization in sub-threshold circuit design

Sub-threshold circuits have emerged as a strong candidate for use in future energy-constrained applications. In a non-homogeneous design paradigm containing both sub-threshold and high power-density super-threshold blocks, it becomes imperative to examine the thermal effects on sub-threshold operation. In this paper, we investigate the thermal impact on sub-threshold current, delay and energy and develop analytical models of the same. Unlike super-threshold, the sub-threshold ION increases exponentially with temperature while the I_ON-to-I_OFF ratio degrades by 0.52%degC. While delay decreases, energy increases with temperature due to relative increase in leakage power at the higher temperatures. Studies performed on noise-margins, current/delay variability and sub-V_th interconnects suggest that sub-V_th circuits can retain {power, delay, energy} optimality over a relatively high temperature range of 25-75degC.