Title :
CMOS transistor reliability and performance impacted by gate microstructure
Author :
Yu, Bin ; King, Tsu-Jae ; Hu, Chenming ; Ju, Dong-Hyuk ; Kepler, Nick
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
This paper investigate the impact of CMOS (complementary metal-oxide-semiconductor) gate microstructure on the reliability and performance of deep-submicrometer CMOS transistors. The amorphous silicon (α-Si) gate provides better capability for suppression of boron penetration in p+ doped gate p-channel MOSFETs, but gate depletion in the α-Si gate is slightly more severe than that of the poly-Si gate. The gate-length-dependent gate-depletion effect, in which the difference in linear gm between MOSFETs with two different gate microstructures shows a strong Lg-dependence, is reported and interpreted by impurity diffusion along the grain boundary. A gate nitrogen implant as an effective method for suppression of the boron diffusion is also discussed with emphasis on the impact on both device reliability and performance
Keywords :
CMOS integrated circuits; MOSFET; doping profiles; grain boundary diffusion; integrated circuit design; integrated circuit reliability; integrated circuit testing; ion implantation; CMOS gate microstructure; CMOS transistor performance; CMOS transistor reliability; CMOS transistors; Si; Si:B; Si:N; SiO2-Si; a-Si gate; amorphous silicon gate; boron diffusion; boron penetration suppression; gate depletion; gate microstructure; gate nitrogen implant; gate-length-dependent gate-depletion effect; grain boundary impurity diffusion; linear transconductance; p+ doped gate p-channel MOSFETs; poly-Si gate; reliability; Amorphous silicon; Boron; CMOS process; CMOS technology; FETs; Implants; Integrated circuit technology; MOSFETs; Microstructure; Nitrogen;
Conference_Titel :
Integrated Reliability Workshop Final Report, 1997 IEEE International
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
0-7803-4205-4
DOI :
10.1109/IRWS.1997.660278
