Title :
A 3.3 V 133 MHz 32 Mb synchronous mask ROM [in CMOS]
Author :
Park, J.-H. ; Lee, D.-W. ; Im, H.-S. ; Lee, J. ; Lim, Y.-H. ; Lee, W.-K. ; Kim, E.-D. ; Lee, W.-M. ; Suh, K.-D.
Author_Institution :
Samsung Electron. Co. Ltd., Kiheung, South Korea
Abstract :
A 32Mb synchronous mask ROM (SMROM) improves performance of systems using mask ROM (MROM). SMROM has multiplexed address pins as does synchronous DRAM (SDRAM) to reduce the number of address pins. Since pin functions and commands of SMROM are almost identical to those of SDRAM, SMROM can share the same SDRAM bus and can be controlled by the SDRAM controller with minor modification. The device operates either in single-word (SW) mode for 16b data bus, or in double-word (DW) mode for 32b data bus, by use of a WORD control pin.
Keywords :
read-only storage; 133 MHz; 16 bit; 3.3 V; 32 Mbit; 32 bit; CMOS; SDRAM bus; SMROM; double-word mode; multiplexed address pins; pin functions; single-word mode; synchronous mask ROM; Clocks; Content addressable storage; Costs; Decoding; Delay; Noise generators; Pins; Read only memory; SDRAM; Switches;
Conference_Titel :
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4344-1
DOI :
10.1109/ISSCC.1998.672502
