The use of hybrid logarithmic arithmetic for root raised cosine matched filters in WCDMA downlink receivers

The paper compares and contrasts the performance of a root raised cosine matched filter implemented using hybrid logarithmic arithmetic with that of standard binary and floating point implementations. Hybrid logarithmic arithmetic is advantageous for FIR digital filters since it removes the necessity for the use of high speed array multipliers. These can be replaced by simple lookup table structures for conversion to and from the logarithmic domain. Matlab simulations of the hybrid logarithmic structure show that its performance is superior to that of recently published fixed point solutions, while offering a significantly reduced complexity when compared to floating point equivalents proposed for the WCDMA downlink in receiver applications. The use of hybrid logarithmic arithmetic also has the potential to reduce the power consumption, latency and hardware complexity for mobile handset applications.