• DocumentCode
    3097007
  • Title

    A comparative study of programmable realization techniques of multi-valued multi-threshold functions

  • Author

    Abd-El-Barr, M.H. ; Choy, H. ; Jain, A.K. ; Bolton, R.J.

  • Author_Institution
    Dept. of Comput. Sci., Saskatchewan Univ., Saskatoon, Sask., Canada
  • fYear
    1991
  • fDate
    26-29 May 1991
  • Firstpage
    372
  • Lastpage
    381
  • Abstract
    Four programmable structures have been proposed earlier for realization of multivalued multithreshold (MVMT) functions. Each of these structures consists of repeated modules each of which realizes either a unit step function or a staircase function. Two structures for realization of MVMT functions are introduced which are shown to be superior to existing structures in terms of the chip-pin count needed and the chip area are consumed. A comparative study of three programmable structures is provided in terms of these two measures. The basis for the comparison is the set of four-, six-, and eight-valued three- to six-threshold functions
  • Keywords
    logic circuits; logic design; many-valued logics; MVMT; multi-valued multi-threshold functions; multivalued multithreshold; programmable realization; programmable structures; Area measurement; Arithmetic; Charge coupled devices; Delay; Logic circuits; Logic devices; Logic gates; Programmable logic arrays; Semiconductor device measurement; Signal generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 1991., Proceedings of the Twenty-First International Symposium on
  • Conference_Location
    Victoria, BC
  • Print_ISBN
    0-8186-2145-1
  • Type

    conf

  • DOI
    10.1109/ISMVL.1991.130759
  • Filename
    130759