DocumentCode
309721
Title
35 dB/3 GHz LNA on 0.8 μm BiCMOS with 8 mW/2 V
Author
Tchamov, Nikolay ; Jarske, Petri
Author_Institution
Telecommun. Lab., Tampere Univ. of Technol., Finland
Volume
2
fYear
1996
fDate
13-16 Oct 1996
Firstpage
623
Abstract
The proposed circuit of a monolithic band-pass Low-Noise-Amplifier (LNA) provides on 0.8 μm BiCMOS (17 GHz NPN) a gain of 35 dB at 3 GHz and need only 8 mW from low-voltage power supply (2V). It is built using a common-base stage followed by a modified White´s cascode, both employing low-Q inductors on-chip. The central frequency can be pre-tuned within ±10%, and the gain pre-set independently within 20 and 40 dB. The circuit is suitable for use as amplifier-filter-buffer in various wireless communications units
Keywords
BiCMOS analogue integrated circuits; MMIC amplifiers; UHF amplifiers; integrated circuit noise; 0.8 micron; 2 V; 3 GHz; 35 dB; 8 mW; BiCMOS LNA; common-base stage; low-noise amplifier; modified White cascode; monolithic band-pass LNA; onchip low-Q inductors; wireless communications units; BiCMOS integrated circuits; Capacitors; Circuit topology; Equivalent circuits; Frequency; Impedance matching; Inductors; Resistors; Resonance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on
Conference_Location
Rodos
Print_ISBN
0-7803-3650-X
Type
conf
DOI
10.1109/ICECS.1996.584439
Filename
584439
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