SRAM-based FPGAs: a structural test approach

This paper presents a structural approach for testing SRAM-based FPGAs taking into account the configurability of such flexible devices. The SRAM-based FPGA architecture is first discussed identifying the specific FPGA test problems as well as the FPGA test properties. The FPGA architecture is then conceptually divided into different architectural elements such as the logic cells, the interconnect cells and the RAM cells. For each architectural element appropriated fault models are proposed, and test configurations and test vectors are derived targeting the fault models under consideration. Taking into account the extremely long time required for SRAM-based FPGA re-configuration, the main objective of the proposed structural approach is the minimization of the number of test configurations