DocumentCode :
309765
Title :
Reduction of phase noise in single transistor oscillators
Author :
Underhill, M.J.
Author_Institution :
Dept. of Electron. & Electr. Eng., Surrey Univ., Guildford, UK
fYear :
1996
fDate :
5-7 Mar 1996
Firstpage :
476
Lastpage :
490
Abstract :
In this paper good phase noise has been taken as the predominant requirement for any oscillator. Many apparently different single transistor oscillator types can be analysed using the same fundamental phase noise model. This model indicates the noise match and power match conditions required to give the best phase noise. Noise matching gives only a small advantage. Phase noise can be optimised almost automatically by minimising tuned circuit losses and maximising tuned circuit voltages. It is shown that the Clapp oscillator is a good design for low phase noise, but there is a modified Clapp design which could give better phase noise performance at high frequencies
Keywords :
voltage-controlled oscillators; BJT amplifier stage; Clapp class of oscillator; Colpitts oscillator; VCO; equivalent circuits; feedback oscillators; figure of merit; noise match conditions; optimisation; optimum output load; overall noise floor; phase noise reduction; phase shift; pi network class; single transistor oscillators; transconductance device; tuned network;
fLanguage :
English
Publisher :
iet
Conference_Titel :
European Frequency and Time Forum, 1996. EFTF 96., Tenth (IEE Conf. Publ. 418)
Conference_Location :
Brighton
ISSN :
0537-9989
Print_ISBN :
0-85296-661-X
Type :
conf
DOI :
10.1049/cp:19960099
Filename :
584912
Link To Document :
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