DocumentCode :
3097885
Title :
Improving logic density of QCL masterslices by using universal logic gates
Author :
de Lima, Fernanda Gusmão ; Carro, Luigi ; Güntzel, José Luís ; de O.Johann, M. ; Reis, Ricardo
Author_Institution :
Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
fYear :
1998
fDate :
30 Sep-3 Oct 1998
Firstpage :
204
Lastpage :
207
Abstract :
Quick Customizable Logic (PCL) is an architecture for gate array masterslices which uses predefined metal layers, being customizable by a single metal layer. This paper presents a new and area efficient architecture for gate arrays using Universal Logic Gates (ULGs) as basic elements for QCL masterslices. Area comparison was accomplished by mapping various medium and large complexity MCNC91 combinational and sequential circuits onto the ULG-based QCL and a transistor strip-based QCL, both programmed by the last metal layer. Preliminary results showed that excellent area reduction is achievable without compromising electrical performance
Keywords :
CMOS logic circuits; cellular arrays; integrated circuit layout; logic design; logic gates; programmable logic arrays; CMOS process; MCNC91 circuits; QCL masterslices; area efficient architecture; combinational circuits; gate array masterslices; logic density improvement; metal layer programming; quick customizable logic; sequential circuits; universal logic gates; Circuits; Energy consumption; Field programmable gate arrays; Libraries; Logic arrays; Logic gates; Production; Prototypes; Quantum cascade lasers; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuit Design, 1998. Proceedings. XI Brazilian Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-8186-8704-5
Type :
conf
DOI :
10.1109/SBCCI.1998.715442
Filename :
715442
Link To Document :
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