DocumentCode
3098256
Title
Parallel logic simulation on a distributed memory machine
Author
Matsumoto, Yukinori ; Taki, Kazuo
Author_Institution
Inst. for New Generation Comput. Technol., Toyko, Japan
fYear
1992
fDate
16-19 Mar 1992
Firstpage
76
Lastpage
80
Abstract
The paper reports on an efficient logic simulation system using the Time Warp mechanism, implemented on a large-scale multiprocessor (Multi-PSI). The system includes local message schedulers, an antimessage reduction mechanism and a load distribution scheme to enhance performance. In the authors´ experiment, using 64 processors, 50-fold speedup and 100 K events/sec performance was obtained. The paper also reports on an empirical comparison between the Time Warp mechanism and two other mechanisms: a conservative approach and a synchronous approach. The comparison shows that the Time Warp mechanism is the most suitable for large-scale multiprocessors
Keywords
circuit analysis computing; discrete event simulation; distributed memory systems; logic CAD; Time Warp mechanism; antimessage reduction mechanism; distributed memory machine; large-scale multiprocessor; load distribution; local message schedulers; logic simulation system; Circuit simulation; Computational modeling; Discrete event simulation; Feedback circuits; Feedback loop; History; Large-scale systems; Logic; Parallel processing; Time warp simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location
Brussels
Print_ISBN
0-8186-2645-3
Type
conf
DOI
10.1109/EDAC.1992.205898
Filename
205898
Link To Document