DocumentCode :
3098502
Title :
Partitioned bus-invert coding for power consumption optimization of data bus
Author :
Sun, Junkai ; Jiang, Anping
Author_Institution :
Second Design Dept., Beijing Microelectron. Technol. Inst., Beijing, China
Volume :
2
fYear :
2011
fDate :
11-13 March 2011
Firstpage :
452
Lastpage :
455
Abstract :
For VLSI design in deep submicron technology, the bus energy reduction becomes more and more important. In this paper, we modify the bus-invert coding method to maximize the power consumption reduction of data bus. Unlike the conventional scheme in which the whole bus lines are considered for bus-invert coding, our scheme partitions the bus lines into several sub-buses and each partitioned sub-bus is coded independently by bus-invert coding method. For an 8-bit data bus the bus-invert coding method can reduce at least 25% power consumption, while the traditional bus-invert method is 18.75 %.
Keywords :
VLSI; encoding; field buses; low-power electronics; system buses; VLSI design; bus energy reduction; bus lines; bus-invert coding method; bus-invert method; data bus; deep submicron technology; partitioned bus-invert coding; partitioned subbus; power consumption optimization; power consumption reduction; Capacitance; Encoding; Hamming distance; Logic gates; Power demand; Receivers; Switches; Bus switching; Coding; Low power; Partitioned Bus-Invert coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Research and Development (ICCRD), 2011 3rd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-61284-839-6
Type :
conf
DOI :
10.1109/ICCRD.2011.5764172
Filename :
5764172
Link To Document :
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