DocumentCode
3098603
Title
Table models for efficient MOS circuit simulation on vector processors
Author
Eickhoff, K.M.
Author_Institution
Inst. fur Theor. Elektrotech., Aachen Univ.
fYear
1992
fDate
16-19 Mar 1992
Firstpage
212
Lastpage
218
Abstract
A new circuit simulator for the accurate and economical analysis of large MOS circuits is presented. The use of table models instead of analytical models improves the classical circuit simulation in two aspects: First, the generation of the underlying data tables from numerical device simulations enhances the accuracy and enables the evaluation of future technologies. Secondly, the much higher vectorizability results in a simulation speed-up of up to 25 on vector processors
Keywords
MOS integrated circuits; approximation theory; circuit analysis computing; integration; interpolation; parallel algorithms; vector processor systems; MOS circuit simulation; circuit simulator; numerical device simulations; table models; vector processors; Analytical models; Circuit simulation; Numerical simulation; Vector processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location
Brussels
Print_ISBN
0-8186-2645-3
Type
conf
DOI
10.1109/EDAC.1992.205925
Filename
205925
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