DocumentCode
3098713
Title
A pragmatic approach to the automation of the logic design process
Author
Nguyen, H.N. ; Ducousso, L. ; Thill, M. ; Vallet, P.
Author_Institution
Bull SA, Les Clayes-sous-Bois, France
fYear
1992
fDate
16-19 Mar 1992
Firstpage
262
Lastpage
266
Abstract
The paper describes a logic-design system and its associated methodology used in developing the BULL DPS7000 mainframe system. The originality of the work lies in the methodology that integrates a set of state-of-the-art logic synthesis and formal verification techniques to make an effective logic-design system to support an iterative synthesis process
Keywords
VLSI; logic CAD; mainframes; BULL DPS7000 mainframe system; automatic logic design; formal verification; iterative synthesis process; logic synthesis; Circuit synthesis; Design automation; Design methodology; Formal verification; Hardware; Logic circuits; Logic design; Signal synthesis; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location
Brussels
Print_ISBN
0-8186-2645-3
Type
conf
DOI
10.1109/EDAC.1992.205935
Filename
205935
Link To Document