DocumentCode
3098982
Title
Planning strategies for area routing
Author
Tsai, Chia-Chun ; Chen, Sao-Jie ; Chen, Yuh-Lin ; Hu, Yu-Hen
Author_Institution
Dept. of Electron. Eng., Nat. Taipei Inst. of Technol., Taipei, Taiwan
fYear
1992
fDate
16-19 Mar 1992
Firstpage
338
Lastpage
342
Abstract
The area routing problem, solved with two meta-planning strategies (graceful retreat and least impact), is presented in this paper. These strategies are used to effectively manage the selection of net segments and the assignment of track resources. Many examples extracted from the literature are experimentally tested and most of layout results are better than other routers
Keywords
VLSI; circuit layout CAD; network routing; VLSI chip layout; area routing; graceful retreat; least impact; meta-planning strategies; net segments; track resources; Gears; Integrated circuit interconnections; Macrocell networks; Resource management; Routing; Sequential analysis; Shape; Strategic planning; Very large scale integration; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location
Brussels
Print_ISBN
0-8186-2645-3
Type
conf
DOI
10.1109/EDAC.1992.205950
Filename
205950
Link To Document