Comparative study of LDPC coding schemes and FPGA implementation for inter-vehicle communications

A novel comparative study of different low-density parity-check (LDPC) coding algorithms and implementation issues through field-programmable gate arrays (FPGAs) technology for wireless vehicular applications is presented. A key development in LDPC codes is the iterative decoding algorithm which uses the belief propagation algorithm. A comprehensive investigation of the performance of different coding schemes was carried out. Four different decoding techniques were tested by computer-based simulations of messages modulated under the binary phase-shift keying modulation scheme and transmitted through a vehicular channel model. Finally, the best performance ratio against complexity algorithm was chosen to be implemented on a Xilinx FPGA platform.