Comparison of via/line package level vs. wafer level results

Author

Tibel, Deborah ; Sullivan, Timothy D.

Author_Institution

IBM Corp., Essex Junction, VT, USA

fYear

2001

fDate

2001

Firstpage

194

Lastpage

199

Abstract

Comparison of lifetime projections from a wafer level test and a package level test (on equivalent parts) is demonstrated, given activation energy and current density exponent from the package level test. Comparison of the acceleration factor between the wafer and package level tests yields good agreement and is described in detail. Kinetics determined from both tests are presented. Physical failure modes are different for the two tests, and implications are discussed

Keywords

current density; electromigration; failure analysis; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; life testing; production testing; acceleration factor; activation energy; current density exponent; electromigration; lifetime projection; package level test; physical failure modes; test kinetics; via/line package level tests; via/line wafer level tests; wafer level test; Current density; Kinetic theory; Life estimation; Life testing; Ovens; Packaging; Stress; Temperature; Tungsten; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2001. Proceedings. 39th Annual. 2001 IEEE International

Conference_Location

Orlando, FL

Print_ISBN

0-7803-6587-9

Type

conf

DOI

10.1109/RELPHY.2001.922901

Filename

922901