Design and analysis of multi-gate field-effect-diodes for embedded memory

Memory arrays consume a very large area in chip designs; yet memory cell scaling lags significantly transistor scaling. With transistor channel lengths in the nanoscale regime, the six transistor static random access memory cell (6T-SRAM) and the single transistor dynamic memory (DRAM) cell both suffer from excessive leakage current. Consequently, there is a widely recognized need for urgent progress in memory technology.