Low-power low-noise 0.13 µm CMOS X-band phased array receivers

Single and 4-element phased array receivers have been developed in 0.13 μm CMOS for 9-10 GHz applications. The design is based on alternating amplifiers and phase shifter blocks to result in the lowest power consumption by limiting the output P1dB of active blocks. The 9-10 GHz phased array results in a measured average gain of 11-12 dB per channel, a NF of 3.0-3.3 dB, a P1dB of -15 to -16 dBm over a bandwidth of 1 GHz. The phased array consumes 19 mW per channel (76 mW - 4 channels) from a 1.2 V supply and occupies an area of 2.7×0.7 mm² (3.0×2.4 mm² - 4 channels). To our knowledge, this is the lowest power consumption silicon phased array to-date with this combination of gain, NF and linearity.