The impact of trench geometry and processing on the performance and reliability of low voltage power UMOSFETs

We report on the performance and reliability of n-channel U-shaped trench-gate metal-oxide-Si field-effect transistors (n-UMOSFETs). Damage induced on the trench sidewalls from the reactive ion etching of the trench is concealed by post-etch cleaning as witnessed by the independence of the effective electron mobility in the channel of the trench geometry. However, charge pumping measurements coupled with electrical stressing of the gate oxide in the Fowler-Nordheim (FN) regime, have shown that the oxide edge adjacent to the drain and the oxide/silicon interface therein are the most susceptible regions to damage in the n-UMOSFET. Using scanning electron microscopy, this is shown to result from gate-oxide growth nonuniformity that is more pronounced at the trench bottom corners where the oxide tends to be thinnest. We also report on n-UMOSFET performance and hot electron stress reliability as functions of the p-well doping