DocumentCode :
3100585
Title :
A differential complementary hartley CMOS voltage controlled oscillator
Author :
Sheng-Lyang Jang ; Heng-Fa Teng ; Wei-Hao Lee ; Chia-Wei Chang
Author_Institution :
Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan
fYear :
2012
fDate :
4-7 Dec. 2012
Firstpage :
1220
Lastpage :
1222
Abstract :
This letter presents a novel complementary low phase noise differential CMOS Hartley voltage-controlled oscillator (VCO), which uses only the supply voltage and the tuning voltage as the biases. The low noise CMOS VCO has been implemented with the TSMC 0.18 um 1P6M polycide CMOS technology. The VCO operates from 5.49 GHz to 6.29 GHz with 13.58% tuning range. The measured phase noise at 1-MHz offset is -118.42 dBc/Hz at 5.65 GHz. The power consumption of the VCO core is 1.694 mW. The VCO occupies a chip area of 0.529 × 0.674 mm2 and provides a figure of merit of -191.09 dBc/Hz. At the supply voltage of 1.1V, the core current of 1.54 mA, the core power consumption is 1.694 mW.
Keywords :
CMOS integrated circuits; phase noise; power consumption; tuning; voltage-controlled oscillators; P6M polycide CMOS technology; TSMC; chip area; core current; differential complementary Hartley CMOS VCO; frequency 5.49 GHz to 6.29 GHz; power 1.694 mW; power consumption; tuning voltage; voltage 1.1 V; voltage-controlled oscillator; CMOS integrated circuits; Inductors; MOSFET circuits; Phase noise; Tuning; Voltage-controlled oscillators; CMOS; Hartley voltage-controlled oscillators (VCOs); balanced and cross-coupled oscillators; phase noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference Proceedings (APMC), 2012 Asia-Pacific
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1330-9
Electronic_ISBN :
978-1-4577-1331-6
Type :
conf
DOI :
10.1109/APMC.2012.6421875
Filename :
6421875
Link To Document :
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