Process engineering to avoid epitaxy at a-Si:H/c-Si interface for heterojunction silicon solar cells

In this work we were observed epitaxial growth at the interface during the deposition of intrinsic a-Si:H layer on c-Si substrates by the hot wire chemical vapor deposition(HWCVD) technique. This crystallinity at the interface gets initiated during the deposition of the first few angstroms of a-Si:H on the c-Si wafer. These crystalline islands which are spatially distributed and are also disjointed can give rise to dominant recombination centers, affecting the charge collection in the device. Therefore, interface engineering is mandatory in heterojunction silicon solar cells. The heterojunction solar cells that we fabricate comprise of a single side polished p-type CZ Si (275 μm) substrate on which we deposit the i a Si:H layer followed by a n-type a-Si:H layer. The cell is completed by depositing the Aluminum grid through a mask. The back surface has a sintered Al contact which gives a back surface field (BSF) on the backside. After removal of the native oxide using chemical etching (dilute HF), the a-Si:H layers are deposited by HWCVD with optimized parameters. Transparent conducting oxide (TCO) layers and metal electrodes are formed by the sputtering and physical vapor deposition (PVD) methods respectively, on the doped layer. The cells are annealed at 200 ^οC for 20 minutes in nitrogen atmosphere.