DocumentCode
3101116
Title
Temperature impact on double gate nTFET ambipolar behavior
Author
Martino, M.D.V. ; Agopian, P.G.D. ; Filhos, S. G Santos ; Martino, J.A.
Author_Institution
LSI, Univ. of Sao Paulo, Sao Paulo, Brazil
fYear
2011
fDate
7-9 Dec. 2011
Firstpage
1
Lastpage
2
Abstract
Considering that the continuous MOS scaling is driving the behavior of this technology to its theoretical limit, new approaches have been considered as alternatives to the future devices generations. In this context, Tunnel Field Effect Transistors (TFETs) have been proposed as a promising option, since its physical structure allows subthreshold swing to reach values lower than 60mV/dec at room temperature [1]. Therefore, these devices would be suitable for ultralow power applications even being implemented with standard SOI CMOS processing techniques.
Keywords
CMOS analogue integrated circuits; field effect transistors; low-power electronics; silicon-on-insulator; continuous MOS scaling; double-gate nTFET ambipolar behavior; standard SOI CMOS processing technique; subthreshold swing; temperature impact; tunnel field effect transistors; ultralow-power applications; Educational institutions; FETs; Junctions; Logic gates; Temperature dependence; Tunneling; USA Councils;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium (ISDRS), 2011 International
Conference_Location
College Park, MD
Print_ISBN
978-1-4577-1755-0
Type
conf
DOI
10.1109/ISDRS.2011.6135339
Filename
6135339
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