Design flow for hardware implementation of digital filters

Digital filters are the basic component of telecommunication, multimedia and radar systems. In this paper, we demonstrate a design flow for hardware implementation of digital filters. In this methodology, we start with high level modeling of filters. Then based on the specification of the problem, we extract a golden model for it. To extract golden model, we analyze peak value estimation, coefficients quantization, word-length optimization and parasitic oscillations. After extracting the golden model, three approaches for hardware implementation are investigated. Area and frequency constraints are important issue for method of implementation. In real-time applications that frequency is an important issue, a fully combinational method should be used. In applications with low sample rates area is more important so we recommend using bit serial- implementation method.