A novel conversion scheme from a redundant binary number to two´s complement binary number for parallel architectures

This paper introduces a novel direct conversion method to convert a redundant binary number to two´s complement number. The method is based on the rules developed in this paper and is used to remove carry propagation during conversion. Therefore, the conversion process is truly parallel and the latency is fixed to 1 digit conversion time regardless of the word size. This converter receives one redundant binary number and converts it into one two´s complement number. A redundant binary number is converted into two redundant binary numbers by using the rules. The new converted numbers are then added with a redundant binary number adder to produce a final sum. The last step is to convert the final sum into its correct two´s complement number