Title :
Design of CMOS analog cells for low-voltage VLSI
Author :
Hung, Chung-Chih ; Hwang, Changku ; Halonen, Kari ; Porra, V. ; Ismail, Mohammed
Abstract :
In this paper, two CMOS analog signal processing circuits which could find wide use in low-voltage VLSI applications are presented. The two circuits include a voltage-to-current converter (V-I converter) and a multiplier. Both of the circuits can operate from rail to rail with a power supply of 3 V. They were fabricated in a 2 μm N-well double-poly CMOS process by MOSIS. In either of the circuits, an N-type circuit cell is connected in parallel with its P-type counterpart to achieve common-mode rail-to-rail operation. For the V-I converter, a nominal value of a 200 μS transconductance with a tuning range of 0.5 to 2 is obtained when the input signal swing is 1 VPP. For the analog multiplier, it is realized by a parallel connection of the two V-I converters. Both of the input signal swings of the multiplier are measured as 1 VPP and 1.6 V PP, respectively
Keywords :
CMOS analogue integrated circuits; VLSI; analogue multipliers; analogue processing circuits; circuit tuning; convertors; integrated circuit design; 2 micron; 200 muS; 3 V; CMOS analog cells; MOSIS; N-well double-poly CMOS process; V-I converter; analog signal processing circuits; common-mode rail-to-rail operation; low-voltage VLSI; multiplier; parallel connection; tuning range; voltage-to-current converter; CMOS analog integrated circuits; CMOS process; CMOS technology; Laboratories; Power supplies; Rail to rail operation; Signal processing; Very large scale integration; Virtual colonoscopy; Voltage;
Conference_Titel :
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-7803-3636-4
DOI :
10.1109/MWSCAS.1996.594014
