Title :
Improved low voltage dynamic BiCMOS logic gates using output feedthrough
Author :
Rezaul Hasan, S.M. ; Rajagopal, C. ; Ula, Nazmul
Author_Institution :
Sch. of Electr. & Electron. Eng., Univ. Sains Malaysia, Perak, Malaysia
Abstract :
Improvements over recently proposed dynamic BiCMOS gates are presented. The well-known “MOS clock feedthrough effect” is used to achieve full swing with substantially reduced low-to-high transition delay. This improved design allows the BiCMOS dynamic gate to operate down to 1.5 V supply voltage, and hence, makes it suitable for advanced deep sub-quarter-micron BiCMOS technologies with considerably scaled down power supplies
Keywords :
BiCMOS digital integrated circuits; BiCMOS logic circuits; clocks; delays; integrated circuit design; logic gates; 1.5 V; MOS clock feedthrough effect; dynamic BiCMOS logic gates; low-to-high transition delay; output feedthrough; scaled down power supplies; sub-quarter-micron BiCMOS technologies; BiCMOS integrated circuits; Clocks; Delay; Dynamic voltage scaling; Logic circuits; Logic devices; Logic gates; Low voltage; Output feedback; Power supplies;
Conference_Titel :
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-7803-3636-4
DOI :
10.1109/MWSCAS.1996.594043
