Novel interpolation method for quadrature encoder square signals

The paper presents a design and implementation of a novel but simple interpolation algorithm by a field programmable gate array (FPGA) to raise resolution of an incremental encoder by sixty-four times. A frequency-independent phase shift (FIPS) circuit is employed to shift the square-waveform signals of channels A and B by some specified electric angles. These delayed signals are performed by simple logic exclusive-or function to generate a pair of new squared signals with 64-fold frequency of channel A. As compared with conventional methods, the algorithm provides many merits, such as square-waveform instead of sinusoidal signals being required, independence of and applicable to any operating frequency/velocity of motors, without need of any analog-to-digital converter (ADC), resistor, or operational amplifier. Finally, the effectiveness of the proposed algorithm will be demonstrated through the experimental results and error analysis.