DocumentCode
3105633
Title
Address generation for array access based on modulus m counters
Author
Grant, Douglas M. ; Denyer, Peter B.
Author_Institution
Edinburgh Univ., UK
fYear
1991
fDate
25-28 Feb 1991
Firstpage
118
Lastpage
123
Abstract
The necessary task of address generation for RAM and ROM accesses can often result in hardware taking up an appreciable fraction of the area of a data processing IC. Close examination of the address sequences can reveal symmetry which may be exploited to automatically devise small and simple address generators, based on counters. The authors describe automated techniques used to recognise and develop symmetries in address sequences, and to synthesise the necessary address generation hardware
Keywords
counting circuits; logic CAD; address generation for array access; address generators based on counters; high level synthesis; modulus m counters; Binary sequences; Counting circuits; Data processing; Hardware; High level synthesis; Process design; Random access memory; Read only memory; Read-write memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation. EDAC., Proceedings of the European Conference on
Conference_Location
Amsterdam
Type
conf
DOI
10.1109/EDAC.1991.206373
Filename
206373
Link To Document