DocumentCode :
3105730
Title :
Modeling the channel potential and threshold voltage of a fully depleted Double Gate Junctionless FET
Author :
Gupta, Puneet ; Burman, D. ; Das, Joydeep ; Brahma, Madhuchhanda ; Rahaman, Hafizur ; Dasgupta, Parthasarathi
Author_Institution :
Bengal Eng. & Sci. Univ., Howrah, India
fYear :
2012
fDate :
28-29 Dec. 2012
Firstpage :
149
Lastpage :
152
Abstract :
An analytical model for the 2D potential distribution in sub-threshold regime of operation of a Double Gate Junctionless FET (DG-JL FET) structure is developed. Threshold voltage is computed by computing the minimum value of channel potential. The model predicts the threshold voltage of the device with reasonable accuracy.
Keywords :
field effect transistors; technology CAD (electronics); channel potential; fully depleted double gate junctionless FET; sub-threshold regime; threshold voltage; Decision support systems; Intelligent systems; SCE; TCAD; junctionless FET; threhold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Devices and Intelligent Systems (CODIS), 2012 International Conference on
Conference_Location :
Kolkata
Print_ISBN :
978-1-4673-4699-3
Type :
conf
DOI :
10.1109/CODIS.2012.6422158
Filename :
6422158
Link To Document :
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