DocumentCode
3105924
Title
Fast heuristic algorithms for finite state machine minimization
Author
Kannan, L.N. ; Sarma, D.
Author_Institution
Cadence Design Syst., Santa Clara, CA, USA
fYear
1991
fDate
25-28 Feb 1991
Firstpage
192
Lastpage
196
Abstract
A technique for the minimization of completely and incompletely specified sequential machines is described. By employing fast heuristic algorithms, it is shown that it is possible to effectively reduce large (121 states) finite state machines in reasonable computing time when compared to other methods. It has been shown that it is possible to achieve area/literal reductions in the range of 30-100% over unreduced machines using this technique
Keywords
finite automata; minimisation; area reduction; completely specified sequential machines; computing time; fast heuristic algorithms; finite state machine minimization; incompletely specified sequential machines; large finite state machines; literal reduction; redundant states elimination; state reduction; Automata; Computer science; Heuristic algorithms; Inspection; Logic; Minimization methods; Polynomials; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation. EDAC., Proceedings of the European Conference on
Conference_Location
Amsterdam
Type
conf
DOI
10.1109/EDAC.1991.206388
Filename
206388
Link To Document