Title :
Proceedings 19th IEEE VLSI Test Symposium. VTS 2001
fDate :
April 29 2001-May 3 2001
Abstract :
The following topics were dealt with. BIST techniques; fault diagnosis; test data compression; DFT; scan chain design; ATPG; SOC testing; self-test techniques; memory testing; scalable fault simulation; analogue testing; memory diagnosis; reliability; and delay measurement
Keywords :
VLSI; application specific integrated circuits; automatic test pattern generation; boundary scan testing; built-in self test; circuit simulation; data compression; delays; design for testability; fault diagnosis; integrated circuit reliability; integrated circuit testing; logic simulation; logic testing; ATPG; BIST techniques; DFT; SOC testing; analogue testing; delay measurement; fault diagnosis; memory diagnosis; memory testing; reliability; scalable fault simulation; scan chain design; self-test techniques; test data compression;
Conference_Titel :
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location :
Marina Del Rey, CA, USA
Print_ISBN :
0-7695-1122-8
DOI :
10.1109/VTS.2001.923408
