DocumentCode :
3106276
Title :
Compression technique for interactive BIST application
Author :
Kay, Douglas ; Mourad, Samiha
Author_Institution :
Santa Clara Univ., CA, USA
fYear :
2001
fDate :
2001
Firstpage :
9
Lastpage :
14
Abstract :
This paper presents a compression technique that reduces the test data volume while achieving high fault coverage within a Built-In Self-Test environment. The LFSR control data target only the RPR faults. The data are further reduced using a new code. Analysis of essential attributes of the control data is performed to assess their effect on the compression technique. The scheme was applied to several benchmark cores and indicated a superior effect than previously used compression techniques
Keywords :
application specific integrated circuits; automatic testing; built-in self test; data compression; fault diagnosis; integrated circuit testing; logic testing; shift registers; LFSR control data; RPR faults; benchmark cores; built-in self-test environment; compression technique; fault coverage; interactive BIST application; random pattern resistant faults; test data volume; Automatic testing; Bandwidth; Benchmark testing; Built-in self-test; Circuit faults; Circuit testing; Fault detection; Performance analysis; System testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location :
Marina Del Rey, CA
Print_ISBN :
0-7695-1122-8
Type :
conf
DOI :
10.1109/VTS.2001.923411
Filename :
923411
Link To Document :
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