Title :
Novel spectral methods for built-in self-test in a system-on-a-chip environment
Author :
Giani, Ashish ; Sheng, Shuo ; Hsiao, Michael S. ; Agrawal, Vishwani D.
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
This new method of built-in self-test (BIST) for sequential cores on a system-on-a-chip (SOC) generates test patterns using a real-time program that runs on an embedded processor. Alternatively, the same program can be run on an external low-cost tester. This program generates patterns using circuit-specific spectral information in the form of one or more Hadamard coefficients. The coefficients are extracted from high fault-coverage compacted pattern sets. When an embedded processor is available on SOC, the overhead is negligible. Also, sequential cores are tested in the functional mode, avoiding activation of nonfunctional timing paths. We present experimental results to show that for hard to test circuits, with any given test time, spectral patterns provide significantly higher fault coverage than weighted-random patterns
Keywords :
Hadamard transforms; VLSI; automatic test pattern generation; built-in self test; integrated circuit testing; logic testing; microprocessor chips; mixed analogue-digital integrated circuits; sequential circuits; spectral analysis; ATPG; BIST; Hadamard coefficients; SoC environment; built-in self-test; circuit-specific spectral information; embedded processor; functional mode testing; high fault-coverage compacted pattern sets; real-time program; sequential cores; spectral methods; system-on-a-chip environment; test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Data mining; Real time systems; Sequential analysis; System testing; System-on-a-chip; Test pattern generators;
Conference_Titel :
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location :
Marina Del Rey, CA
Print_ISBN :
0-7695-1122-8
DOI :
10.1109/VTS.2001.923434