DocumentCode
3106774
Title
Synchronous state machine inner FPGA controlling PFC boost converter
Author
Jappe, Tiago Kommers ; Mussa, Samir Ahmad ; Rosendo, Richard Henry Sutter
Author_Institution
INEP-Power Electron. Inst., Fed. Univ. of Santa Catarina, Florianópolis, Brazil
fYear
2010
fDate
4-7 July 2010
Firstpage
1097
Lastpage
1102
Abstract
The FPGA device is an IC that can be programmable by software, to implement any logical function. Its inner architecture offers possibility to execute complex algorithms, even some parts running in parallel, improving law control dynamics. In consequence, the FPGA can control power electronics converters successfully. The several segments of the converter control are connected and synchronized by a state machine. Thus, this paper proposes a design of a synchronous state machine to control a PFC boost converter with FPGA. The communication between FPGA and ADC is implemented by SPI communication. The controllers and PWM modulator are build in FPGA to control the converter. Experimental results show the mains signals of state machine and also the boost converter in operation.
Keywords
PWM power convertors; control engineering computing; field programmable gate arrays; finite state machines; power factor correction; synchronous machines; ADC; PFC boost converter; PWM modulator; SPI communication; converter control; inner FPGA controlling; power electronics converters; state machine; synchronous state machine; Converters; Data acquisition; Field programmable gate arrays; Pulse width modulation; Synchronization; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics (ISIE), 2010 IEEE International Symposium on
Conference_Location
Bari
Print_ISBN
978-1-4244-6390-9
Type
conf
DOI
10.1109/ISIE.2010.5636865
Filename
5636865
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